比特流

  • 网络BitTorrent;Bit Stream;Bit;BitStream
比特流比特流
  1. 接收模块在内部有限状态机的控制下能够从串行输入的比特流中检测到一个字符帧的开始和结束,并提取8bits数据以并行方式输出。

    Receiver module uses another finite state machine to detect start and end of character frame from the serial bit stream , it also extracts 8 bits parallel data from the bit stream as output .

  2. 在视频流传输中,低比特流(128bit/s)时,其PSNR也达到35dB左右。

    The lossless compression ratio is high up to 5.5 . In video transmission , the PSNR under low bit stream ( 128 bit / s ) is up to 35 dB . The experiments show that this scheme is fast and has good PSNR .

  3. 大容量MP3比特流音频隐写算法

    High Capacity Audio Steganography in MP3 Bitstreams

  4. 然后可以构建烧制到平台闪存的最终可发行的比特流,或者构建设计用来配置FPGA的任何方法。

    You then build a final , shippable bitstream which gets burned onto your platform flash , or whatever method your design uses to configure the FPGA .

  5. 不幸的是,执行此操作时,XPS会检查依赖项,并试图在下载比特流之前构建它。

    Unfortunately , when you do this , XPS will check the dependencies and try to build the bitstream before downloading it .

  6. FGS比特流的差错复原性能

    Error Resilience Performance of FGS Bit Streams

  7. 通常的方法是在FPGA比特流中的一段块RAM(BRAM)内包含一个小程序。

    The usual method is to include a tiny program inside a piece of block RAM ( BRAM ) within the FPGA bitstream .

  8. 首先,由原始图像边缘图的Hash函数输出的信息摘要比特流生成水印序列。

    First , the watermark sequence is generated from the message digest using the output of the Hash function with the original image 's significance edge map .

  9. ISE可对工程进行仿真、综合,最后完成算法的硬件化,也可由systemgenerator直接生成比特流文件,并下载到FPGA。

    In ISE the designer can simulate , synthesis , and complete the hardware-oriented of an algorithm at the last . System Generator can also generate the bit-stream directly , and download to the FPGA .

  10. 仿真结果表明,该打包方案可以明显地改善FGS比特流的差错还原能力。

    Simulation results show that this packing scheme can improve the error resilience capability of the FGS bit streams significantly .

  11. 在软件开发完成后,将配置生成的比特流文件通过JTAG电缆下载到FPGA开发板上,实现FPGA开发板与PC机之间的通信。

    After software design , we get the function of communication between FPGA board and PC computer by downloading bitstream files created after Configuration into the FPGA broad through JTAG cable .

  12. 为此,作者采用了合理的数据压缩算法来解决这一问题,其中,JPEG压缩算法被用来处理静态图像而H.263压缩算法实现了基于低比特流的视频数据压缩编码。

    Proper compress algorithms are chosen to solve this problem . We choose the JPEG algorithm to compress static image and the H.263 for video image .

  13. 并按照ITUTH.263协议及相关标准实现了基于低比特流的视频数据压缩编码技术。

    It is emphasized that video compression coding based on low bit rate stream with ITU_T H.263 agreement and related international standards is realized .

  14. 研究了FGS比特流在IP网络上的传输特性,并为FGS比特流引入了一种差错还原打包方案。

    In this paper , the transmission performance of FGS bit streams over IP networks is researched and a error resilient packing scheme for FGS bit streams is introduced .

  15. 如果使用CPLD方法配置FPGA,则可在一个NOR闪存芯片中存储FPGA比特流和所需的代码;这可能是最简单的系统设计。

    If you use the CPLD method of configuring the FPGA , you can store both the FPGA bitstream and the required code in a single NOR flash chip ; it 's probably the simplest system design .

  16. 该文针对精细可分级编码(FGS)比特流在时变带宽网络上的传输,提出了一种基于视频序列率失真(R-D)特性的FGS增强层的优化码率分配算法。

    A new efficient rate allocation method based on video R-D characteristics of MPEG-4 FGS enhancement layer in its streaming application on time-varying-bandwidth network is proposed .

  17. 它通过时域层、空域层和质量(SNR)层的混合可分级的机制,在比特流级上实现可分级性,同时具有很好的压缩效率。

    The goal of SVC is to provide scalability at the bitstream level with good compression efficiency by allowing combinations of scalable layers , including the spatial layer , temporal layer and Signal-to-Noise Ratio ( SNR ) layer .

  18. 对JPEG2000比特流中重要性不同的部分,用不同编码速率的RCPC信道编码给以不同程度的信道保护。

    Using different RCPC rate coding , different channel protection capabilities are applied to the bitstream components with different importance .

  19. 提出了基于比特流的隐藏方法,该方法是通过两个码字长度和符号位长度都相等的VLC码字互相替换来嵌入信息。

    Propose a hiding method base on bit-stream , this method insert data by swapping two VLC codes which with the same size of code word and the same size of single bit .

  20. H.263等低比特流视频标准的制定以及功能日趋强大的手机芯片的不断推出,都推动着多媒体手机的快速发展,并使手机生产厂商的竞争日趋激烈。

    The establishment of low-bit-rate stream video standard like H.263 and continual launch of powerful chip solutions for GSM / GPRS phone all propels rapid development of the multimedia mobile and consequently leads to fierce competition among the producers .

  21. 基于最大后验概率判决准则,提出了两种只有前向递推的软输出译码算法,它们具有较低的译码延迟,可用于面向连续比特流的turbo码中。

    Two novel type of soft-output decoding algorithms for turbo codes with a convolutional interleaver is proposed , based on a decision rule of symbol-by - symbol maximum a posteriori ( MAP ) probability . Each of them requires only a forward recursion and has lower decoding delay .

  22. 在网络比特流运算结果均匀度分析的基础上,设计了一种均匀高效的哈希函数PRH。

    We first design a uniform and efficient hash function PRH , based on the analysis of the uniformity indices of network bitstream operation results .

  23. 本文针对部分反向可解比特流(PBDBS)[1]中的切换点定位问题,提出了一种自适应定位方法,即比特位置法。

    This paper puts forward an adaptive localization method that can resolve switch point localization problem in the partial backward decodable bit stream ( PBDBS ), e. g.

  24. 统计检验证实了所产生的随机比特流具有理想的分布特性。

    Statistical tests show that the generated random bits have ideal distribution .

  25. 试验证明对于非实时处理低比特流视频,有一些应用前景。

    Experiment proves it has some application perspective in non-real time video procession .

  26. 并且,其中两个比特流中的‘0/1’出现的概率有一定聚集趋势,这个特点使得它们适合于算术编码器发挥作用,以取得高压缩效率。

    Finally , the three bit streams are compressed respectively in arithmetic coders .

  27. 729的比特流可互操作。互文性与博尔赫斯的双向阐发

    729 and the bitstream of G. The Mutual Interpretation between Intertextuality and " Borges "

  28. 该算法按视觉重要性排序,产生一种嵌入式比特流。

    The algorithm produces an embedded code flow arranged in the order of visual importance .

  29. 它可以方便地构造嵌入式的比特流,实现嵌入式编码。

    It can facilitate the construction of an embedded bit stream to achieve an embedded coding .

  30. 729的比特流可互操作。

    729 and the bitstream of G.