静态存储器

该方法通过配置FPGA器件的时钟、逻辑运算电路以及静态存储器来实现A/D转换控制以及补偿分量的计算。

By means of configuring the clock sequence of FPGA devices , logic operation circuits and static memory the computation of control component and A / D conversion control can be implemented by the proposed method .

二是利用继电器和静态存储器构成NVSRAM。

The other is through use of relay and SRAM .

供用户使用的RAM由多个字节的静态存储器构成，可以用于暂时存放数据。

The RAM useful to customer is many bytes of static RAM that available for data storage .

部分耗尽SOI静态存储器位线电路的研究

A study on Bit - Line Circuit for Partially Depleted SOI CMOS SRAM 's

它由高速A/D，D/A转换器及高速静态存储器组成，可通过CCD获取视频图像，并进行存储和回放。

High-speed A / D , D / A and Static Random Access Memory ( SRAM ) are used in this system . It can capture video image by CCD .

给出典型大容量静态存储器（SRAM）的多位翻转实验研究结果。

Single event multiple upset ( SEMU ) experimental results of high-density static random access memory ( SRAM ) are presented .

用普通的静态存储器构成的两个大容量双口RAM，实现了不间断输出的情况下波形的动态更换；

The normal statical RAMs are used to construct two daul port RAMs with large capacity memory and so the dynamic waveform change without stopping the output is achieved .

该方法采用线阵CCD作光电传感器，CCD输出信号经二值化处理后采用静态存储器进行高速存储，完成数据采集的功能，且可通过数字电位器用计算机软件提供二值化阈值信号。

This method uses a linear CCD as photoelectric sensor . After binarized processing , CCD output signal is stored with high speed in SRAM , then finished the data gathering function . The binarized threshold signal is provided by the software through digital potentiometer .

通过在采集卡上放置高速静态存储器，用逻辑控制单元（CPLD）处理数据的方法，以及基于PCI技术使系统具有快速的传输能力，解决了高速数据与计算机之间的实时传输与存储问题。

Solved the problem of real-time transfer and storage , by the method of placing high-speed SRAM in the card and processing data with CPLD . And the system was based on PCI bus , thus it possessed powerful capacity of data transfer .

研究了15.14MeV/u136Xe离子在不同批次的32k×8bits静态存储器中所引起的单粒子效应。

Single event effects induced by 15.14MeV/u 136 Xe ions in different batches of 32 k × 8 bits static random access memory are studied .

本文设计了一款4-Mb（512K×8bit）的高速、低功耗静态存储器（SRAM）。

A 4-Mb CMOS SRAM ( 512K × 8bit ) with high speed and low power assumption has been designed in this paper .

分析了静态存储器的待机节电模式，介绍了构成非易失性SRAM两种方法：一是利用非易失性RAM控制器和静态存储器构成NVSRAM；

This paper analyzes the power-saving properties of SRAM in stand-by mode , and offers two ways to realize non-volatile SRAM . One NVSRAM is through use of Non-volatile RAM Controller and SRAM , combining with SRAM .

旨在通过FPGA的快速、灵活、容易修改的特点，设计并实现在高速数据通信系统中，QDR静态存储器用于处理器和接口连接的外设之间的数据交换。

The purpose of the article is designing and carrying out the QDR using FPGA which is a high speed and easy modifying . The QDR links the processor and interface which are both in the high speed data communication system .

提出了一种基于LFSR与MARCHC+算法的SRAM内建自测试新结构，基于此结构设计了2k×8嵌入式静态存储器（SRAM）的内建自测电路，给出了电路的仿真与综合结果。

This paper presents a new build-in self-test structure of SRAM based on LFSR and MARCHC + , which is designed for a 2K × 8 embedded SRAM . The simulation waveform and synthesis results are provided as well .

网络控制下静态存储器的动态检测系统

Dynamic testing system of SRAM under the network control

随机静态存储器低能中子单粒子翻转效应

Low-energy neutron-induced single-event upsets in static random access memory

静态存储器的存取速度由地址输入到数据输出的关键路径决定。

The access rate of the memory is determined by crucial path which is between data input and data output .

在半导体存储器这一大家庭中，静态存储器由于其广泛的应用成为其中不可或缺的重要一员。

In the large family of semiconductor memories , Static random access memories ( SRAMs ) are an indispensable part because of their broad applications .

据资料显示，目前存储器市场要占整个半导体市场的35%，而静态存储器则占各种存储器总额的15%左右，并且随着技术的改进和工艺的进步，每年以10%的速度递增。

It is said the memory shares the 35 % of the whole semiconductor market , and the SRAM is 15 % of the semiconductor memory sale . Further more , the SRAM market is increasing at the rate of 10 % each year .

CMOS超大容量静态随机存储器研究

Study of CMOS Super Capability Static Random Access Memory

Cache是一种容量非常小、但速度非常快的静态RAM存储器，设置在CPU和主存之间。

Cache is a kind of small-amount and high-speed static RAM memory , residing between CPU and memory .

完全基于绝热电路的静态随机存储器（SRAM）设计

Static random access memory ( SRAM ) design based on adiabatic circuits

由此可见静态随机存储器SRAM的广泛应用前景。

This shows the wide application prospects of the static random access memory .

近年来随着半导体存储器技术的快速发展，静态随机存储器（SRAM）因其速度快的特性被广泛应用于各种高速存取场合。

With the rapid development of semiconductor memories in recent years , SRAM are widely used in various high-speed applications .

在Cache中tagarray主要通过SRAM（静态随机存储器）来实现，要求在单周期内完成对SRAM的存取操作。

Cache tag array is usually implemented by SRAM ( static random access memory ), which is required to fulfill store and load operations in single cycle .

静态随机存储器（SRAM）电路，因为其高速度主要用在诸如CPU缓存等需要高速存取的场合。

Static random access memory is usually used in high-speed occasions such as its being used as cache for CPUs because of its high speed .

静态随机存储器（SRAM）作为一种易失性存储器，在涉及到信息安全的场合中受到了广泛地应用。

As a kind of volatile memory storage , SRAM is widely applied to involving in the occasion of information security .

静态随机存储器（SRAM）是一类非常重要的存储器，广泛用于高性能微处器及片上芯片系统（SoC）中。

Static Random Memory ( SRAM ) as one kind of critical memory is widely used to high-performance microprocessor caches and System-on-Chips ( SoCs ) .

静态随机存储器SRAM作为嵌入式IP应用的一类最主要的高速缓存，已经成为当前数字集成电路领域的一大研究热点。

As a class of most important cache for the embedded IP application , Static Random Access Memory ( SRAM ) has become one of the hottest research topics in the digital integrated circuits field .

存储体单元是静态随机存储器（SRAM）最基本、最重要的组成部分，它在改善系统性能、提高芯片可靠性、降低成本与功耗等方面都起到了积极的作用。

Memory Cell is a basic and important macro block of SRAM . It has played a positive role in improving performance and reliability , lowering cost and power consumption .