绝缘层
- 网络insulation;insulator;dielectric layer;insulation layer;insulated layer
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拆卸绝缘层之前,必须拆下下列部件。
Before removing the insulation , the following components must be removed .
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安装绝缘层并将固定卡子卡到位。
Install insulation and clip retaining clips into place .
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低k绝缘层及其设备
The Low - k Insulating Layer and Its Equipment
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高k绝缘层研究动态
Recent Researching Trends in the High-k Insulating Layer
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4.5倍过电流PVC导线绝缘层特征的分析研究
Study of PVC Wire Insulation Residues Characteristic in 4.5 Times Over-current
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一种用于RF技术的厚绝缘层上的铜电感
Copper Inductor on Thick Insulating Layer for RF Techniques
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铜互连和金属间低K绝缘层可解决布线RC延迟问题,CMP可解决晶圆表面不平整问题。
The CMP technology solves the problem for non-smooth of wafer surface .
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ZnO纳米线双绝缘层结构电致发光器件制备及特性研究
Development and behavior study of a ZnO nanowire-based electroluminescence device with double insulating-layer structure
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糠醇改性聚胺-酰亚胺H级电绝缘层压板的形态结构与耐腐蚀性能
The Morphological Structure and Corrosion Resistance of Poly ( Amine-Imide ) Modified by Furfuryl Alcohol Laminates for H-Grade Electrical Insulating Materials
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金属/绝缘层/硅(MIS)隧道二极管的发光机理
Mechanism of Light Emission From Metal / Insulator / Silicon ( MIS ) Tunnel Diode
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本篇主要围绕着有关构成PCB绝缘层用树脂薄膜制造技术的主题。
The article had summarized mostly thin resin films laminated in PCB insulating layer .
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介绍了一款由Hf基高K介质材料作为栅绝缘层制作的MOSFET。
In the end , this paper introduces a MOSFET fabricated by high-K gate dielectric .
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在功率MOS器件中,作为绝缘层的SiO2质量相当关键。
Power MOS devices need high quality of SiO2 insulating film .
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通过溅射的办法制备了各层电极、绝缘层以及FEA电阻层。
The electrodes , insulator layer and FEA layer are fabricated by sputtering .
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f波超导体/绝缘层/f波超导体结中势垒散射对直流Josephson电流的影响
Barrier Interface Scattering Effect on DC Josephson Current in f-Wave Superconductor / f-Wave Superconductor Junctions
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本文提出了一种用a-Si作绝缘层的表面变容二极管。
A Semiconductor surface varactor with an insulating a-Si layer is presented .
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介绍了铜互连、金属间低K绝缘层和CMP工艺。
The Cu interconnection , low - K insulating layer between the metal and CMP technology are introduced .
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在利用液相法生长ZnO纳米线薄膜的基础上,构造成功基于ZnO纳米线双绝缘层结构的交流电致发光器件。
ZnO nanowire thin film was prepared by chemical solution method and a ZnO nanowire-based electroluminescence device has been successfully developed .
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具有SiO2绝缘层的硅基聚酰亚胺电容式湿度传感器的特性研究
Properties of the Polyimide Capacitive-type Humidity Sensor Based on Si Substrate with a SiO_2 Insulation Layer
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在场致发光(EL)显示器中,当电子击中夹在两层绝缘层中间的荧光粉层时就产生光。
Electroluminescent ( EL ) displays produce light when electrons hit a phosphor layer sandwiched between two insulating layers .
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正常金属-绝缘层-铁磁/超导结微分电导峰的Zeeman劈裂
Conductance peak with Zeeman splitting in normal metal-insulator-ferromagnet / superconductor tunnel junctions
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因此,采用NO直接氧化法制备绝缘层是一种制备高可靠、高灵敏度Si基MOSSDS的技术。
So direct oxidation in NO gas for insulator is an effect technology to fabricate high reliability and high sensitivity MOS Schottky diode hydrogen gas sensor .
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不对称s波超导体/绝缘层/s波超导体结的直流Josephson电流
The dc Josephson Current in the Unsymmetrical s-wave Superconductor / Insulator / s-wave Superconductor Junctions
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为了抑制假模的出现,通过刻蚀沟道深隔离,并在沟槽上沉积SiO2介质绝缘层,增加沟槽对假模的吸收。
In order to suppress the appearance of so-called spurious modes , we etched deep grooves and deposited SiO2 in the grooves .
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薄膜晶体管(ThinFilmTransistor,TFT)是由电极层、半导体层和绝缘层组成的场效应器件。
Thin film transistor ( TFT ) is a kind of field effect device , and it is composed of electrode layer , semiconductor layer and insulator layer .
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同时,通过求解高k栅介质耗尽区与栅绝缘层区域的泊松方程,得到叠层高k栅介质阈值电压模型。
By solving the Poisson equation of the depletion region of high k gate dielectric and gate insulator region , the threshold voltage model of stack high k gate dielectric is got .
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介绍了65nm/45nm工艺的研究成果、157nmF2stepper技术、高k绝缘层和低k绝缘层等技术。
The achievements to research the 65 nm / 45 nm technology , the 157 nm F2 stepper technology , high k and low k insulating material are introduced in this paper .
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SOI指的是在IC的制造过程中采用硅+绝缘层+硅的硅基体结构方式,这种结构方式的优势是可以减小器件的寄生电容并改善器件的性能。
SOI refers to the use of a layered silicon-insulator-silicon substrate in IC manufacturing , which is said to reduce parasitic device capacitance and improve performance .
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计算结果表明通过选择合适的过滤因子和绝缘层的厚度可获得大的TMR。
The large TMR can be achieved by choosing moderate spin filter factor and insulator layer thickness .
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铜互连、金属间低k绝缘层(k<3)和CMP工艺已成为制造高端IC的一个标准工艺。
The Cu interconnection , low-k insulating layer ( k < 3 ) between the metal and CMP technology are a standard technology of the high grade IC manufacturing .