硬件多线程

支持硬件多线程不仅有效地隐藏了访存延迟，而且略去了线程切换时线程相关信息的保存与恢复，减少了线程切换的开销，从而提高了性能。

Hardware multithreading can effectively hide the delay of accessing memory , and reduce the expenses of thread changing , thus enhance the performance .

如何利用硬件多线程技术对PPP协议进行并行化分解，以及如何更好的利用快速消息网络传递报文都是本文的重点。

How to use hardware multi-threading technology on the PPP protocol for parallel decomposition , and how to make better use of the fast message network to transmit the package are the focus of this article .

基于NP的Dijkstra算法硬件多线程实现与性能分析

Performance Analysis and Multithreaded Implementation of Dijkstra Algorithm Based on Network Processor

一种嵌入式硬件多线程处理器的研究

Implementation of a Hardware-Scheduled Multithread Processor for Embedded System

提高硬件多线程处理器性能的方法

Method to Enhance Performance of Hardware Multithread Processor

在当今的网络处理器中，为了提高吞吐率、实现高性能，部分处理器采用了流水线技术和硬件多线程技术。

In order to enhance the turnover rate and the performance , some NPUs have used the pipeline technology and the hardware multithread technology .

在多核时代，为了将不断增长的片上资源转变为程序性能提升，必须充分利用其硬件多线程并行执行的优势。

In the era of CMP , the key of transforming the increasing transistors into performance improvement is to take the advantage of multi-threading parallelism which is the nature of multi-cores .

支持动态可重构的软/硬件统一多线程编程模型

A Unified SW / HW Multi-thread Programming Model Supporting Dynamic Reconfiguration

网络处理器配备了针对网络应用特点的特殊硬件，采用多线程多处理器架构。

NPs have special hardware unit for network processing and employ multi-thread multi-processor architecture .

本文在研究了并行结构体系、并行算法和并行编程的基础上，结合现有的硬件条件，将多线程并行处理方法引入到基于Voxel模型的五坐标数控加工仿真中。

According to our current computer hardware , this paper studies the parallel structions , algorithms and program methods respectively and introduces the multi-threads parallel processing method into our compressed voxel model basement 5-axis NC simulation system .

本文更侧重于桌面用户以及如何使用现有硬件来创建分布式多线程设置。

This article focuses more on the desktop user and how to use existing hardware to create a distributed multihead setup .