现场可编程门阵列

数字下变频器在现场可编程门阵列中实现

Implementation of digital down - converter in FPGA

计算机仿真结果和现场可编程门阵列仿真结果表明，多相滤波的中频数字化接收机设计方法是可行的，并还可灵活地实现现有专用芯片很难实现的宽带接收技术。

The results of computer simulation and FPGA simulation indicate that a technique to design wideband digitized receiver based on polyphase filtering is feasible , and can neatly implement wideband receiver which is difficult to be implemented by extant ASIC .

设计了一种以DSP（数字信号处理器）和FPGA（现场可编程门阵列）为核心的图像压缩系统。

An Image Compressing System is designed with DSP and FPGA .

现场可编程门阵列第四讲FPGA在雷达信号处理系统中的应用

Lesson 4 Application of FPGA in Radar Signal Processing System

用现场可编程门阵列（FPGA）实现步进电机平滑运行。

The smoothly running of step motor can be implemented using FPGA .

提出一种采用现场可编程门阵列器件FPGA实现音频处理芯片的方案。

An audio processing chip is designed by using FPGA in this paper .

探讨现场可编程门阵列（FPGA）器件编程数据的装载模式及过程。

The loading mode and process of programmable data of FPGA device are discussed .

我们选择FPGA（现场可编程门阵列）作为并行处理平台。

We selected FPGA ( Field Programmable Gate Array ) platform for parallel processing .

利用现场可编程门阵列FPGA开发专用实时图像处理系统芯片

Real-time Figure Process System Chip Development With FPGA

系统采用现场可编程门阵列（FPGA）实现。

The system is implemented successfully with field programmable gate array ( FPGA ) .

该算法充分考虑了可实现性和实时性并采用现场可编程门阵列（FPGA）设计实现该算法。

With implementation fully taken into consideration , the algorithm is implemented by adopting FPGA .

所以制造商通常使用现场可编程门阵列（FPGA）。

So , instead , manufacturers often use field programmable gate arrays ( FPGAs ) .

讨论了一种基于现场可编程门阵列（FPGA）的数据加密标准算法实现。

The paper presents a DES implementation based on FPGA and proposes optimal resource scheme .

现场可编程门阵列（FPGA&FieldProgrammableGateArray）是新型的大规模集成逻辑器件。

The FPGA ( Field Programmable Gate Array ) is a new large-scale integrated logic IC .

现场可编程门阵列（FPGA）是数字集成电路芯片，具有可重新配置的特点。

Field programmable gate array ( FPGA ) is a digital integrated circuit chip and reconfigurable .

可编程逻辑，特别是现场可编程门阵列（FPGA）便是这样的解决方案。

Programmable logic , in particular field programmable gate array ( FPGA ) is such a solution .

通过利用现场可编程门阵列FPGA设计微控制器的接口电路，使得电路的设计变得简单灵活。

The design of interface circuits of micro controller becomes simple and flexible due to using FPGA .

第二部分是利用FPGA（FieldProgrammableGateArray，现场可编程门阵列）来实现HDLC协议。

The second part uses FPGA ( Field Programmable Gate Array ) to realize the HDLC protocol .

现场可编程门阵列（FPGA）包含有大量实现组合逻辑的资源，可以完成较大规模的组合逻辑电路设计，提高系统的集成化。

FPGA includes such great number of resources for realizing combinatorial logic to complete large-scale combinatorial circuit designing .

目前大多数可重构计算技术的研究成果基本由现场可编程门阵列器件FPGA和通用处理器构成，由可编程器件提供对复杂运算的加速计算能力。

At present , the research productions of reconfigurable computing are basically composed of FPGA and general-purpose processor .

而现场可编程门阵列器件（FPGA）是一种可以进行重编程和重配置的芯片，可以方便地设计出所需的硬件逻辑。

Additionally FPGA users can conveniently not only design the hardware logic required , but re-program and re-configure .

而现场可编程门阵列（FPGA）则是用硬件处理实时图像数据的理想选择，基于FPGA的图像处理技术是世界范围内广泛关注的研究领域。

However , Field Program Gate Array ( FPGA ) is the ideal hardware choice for real-time image processing .

提出了一种基于FPGA（现场可编程门阵列）和软核CPU的嵌入式系统设计的新方法。

This paper proposes a new method for embedded system designing , based on FPGA and soft-core CPU .

新的跟踪方法采用现场可编程门阵列（FPGA）实现了实时的星点定位；

Real-time star position locating is implemented with Field Programmable Gate Array ( FPGA ) in the star tracking algorithm .

该设计中采用基于现场可编程门阵列（FPGA）的数字电路来代替传统的模拟电路。

This design uses digital circuit based on Field Programmable Gate Array ( FPGA ) instead of analog electronics circuits .

为了减少RS译码器所占用的现场可编程门阵列（FPGA）资源，研究了RS码的译码算法。

To reduce the FPGA resources that RS decoder occupies , the algorithm of RS decoding was studied .

本文介绍了现场可编程门阵列（FPGA）技术的特点和结构原理，阐明了它与传统半导体芯片设计制造技术相比，所具有的强大功能和便于开发的优势。

This paper introduces the properties and structure principle of FPGA technology , indicates its powerful function and advantage of easy-developing .

随着FPGA（现场可编程门阵列）技术的快速发展，万门以上乃至几十万门逻辑阵列的使用越来越普遍。

With the quickly development of Field Programmable Gate Array , FPGA with more than million logic gates has been used .

基于现场可编程门阵列器件，采用分布式运算算法，实现了一种面积有效内积运算IP核的设计。

An IP core based-on FPGA for high-efficiency inner-product operation is implemented , in which a distributed arithmetic algorithm was introduced to compute inner-product .

提供了一个利用现场可编程门阵列（FPGA）实现正交直接数字合成（DDS）专用电路的设计实例。

A design example of FPGA - based quadrature direct digital synthesizer ( DDS ) chip is presented .