同步总线

用PLD构成高速RS&485同步总线接口

High-Speed RS-485 Synchronous Bus Interface Formed by PLD

FPDP总线为32位的并行同步总线，提供多块VME总线板之间的高速数据传输，总线设计不允许地址信息传递。

The FPDP bus is a 32 bit parallel synchronous bus intended to provide high speed data transfer among multiple VME bus boards . The FPDP bus design does not allow for the transmission of address information .

高速同步总线的时序设计

Timing Design of High Speed Synchronous Bus

给出了分布式控制方案中相位同步总线和均流总线的物理实现方法。

The physical implementation methods of the phase synchronization bus and the current-sharing bus have been given .

主要讨论了微处理器的总线分类，分析了同步总线和异步总线的时序特点和使用要点，并介绍了接口相关电路。

In the paper , we firstly discuss the sort of microprocessor bus , and analyse the sequential features and applications of synchronous bus and a synchronous bus . Finally , the paper introduces and designes the relevant interface circuits .

基于SDLC协议的同步RS485总线控制器的设计

Design of Synchronous RS 485 Bus Controller Based on SDLC Protocol

I2C总线是一种两线制同步串行总线，由于其接口简单、运行可靠，得到了广泛应用。

I ~ 2C-bus is a kind of two-wire bus with synchronous serial communication .

设计中采用了异步先进先出来同步APB总线和I2C总线之间的数据交换。

Asynchronous First In First Out ( FIFO ) is adopted to synchronize data transfer between APB bus and I2C bus .

MICROWIRE总线与SPI总线是目前应用非常广泛的两种同步串行总线，由于两种总线协议的不完全兼容性，造成许多设备之间无法进行通信。

Nowadays , the MICROWIRE bus and the SPI bus are widely used in electronic equipment . However , the incompatibility of the two bus protocols makes it impossible to communicate between some equipment using different protocols .

采集的四路同步信号经过PCI总线传到DSP处理。

The four synchronous signals of data collection cards are processed by DSP through PCI bus .

机液同步装置的STD总线微机控制

The Microcomputer Control System with STD Bus for Mechanic Hydraulic Synchronous System

采用了基于多周期同步法的PCI总线频率卡与工业控制微机接口，进行频率测量。

It measures the frequency by PCI card which is base on the method of multi-period synchronization .

目前存在用于实现同步ESB和消息总线（简化的异步ESB）的标准和模式。

Standards and patterns exist today for implementing a synchronous ESB and a message bus that is a simplified asynchronous ESB .